A reduced-order big-signal model of three-phase pulse-width-modulation (PWM) rectifiers is proposed. The analysis and design of the three-phase boost Power Factor Correction (PFC) circuit is far more complex than the dc-to-dc converter, in that the coefficient of the state equation are time-variant. Although they become constants when in steady state in d-q frame, it is difficult to design due to the couple of the d- and q-channel. By combination of the topology transformation and Tellegen's theorem, the mains can be simplified to a boost dc-to-dc converter, thus reduce the mains' order to two, and the parameter of the simplified circuit is deduced. The proposed model can also be linearized to obtain the small-signal model. The small-signal model greatly simplifies the system design, therefore the traditional trial-and-error procedure is deserted. The contrast simulation results indicate that the simplified model can represent the low-frequency big-signal dynamic behavior of the six-switch three-phase PFC circuit.