Complex Programmable Logic Devices Implementation of FFT Processor
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Abstract:
In order to accelerate the working speed of a FFT processor, this paper presents a hardware structure of a FFT processor, which is suitable for CPLD , and the 128-point FFT single-chip processor is realized by means of FLEX10K CPLD and MAX+PLUS II software. The calculation time of the processor is less than 230uS. The research proves that the combination of CPLD and FFT increases the working speed of FFT processors and raise the level of application .
