Abstract:To accurately measure the ascendant time of a high-voltage steep pulse, the pace and precision of counter is highly challenged. The authors put forward the design of high-speed count system based on CPLD and DSP. In this system, the outer crystal oscillator of CPLD act as low-frequency clock whose frequency division and phase invertion are done by D-trigger group designed with CPLD, and finally,they get the counter with 200 MHz i. e. 5ns per period by the method of frequency difference multiply. The counting pace and precision are promoted, and meet the demand to measure the ascendant time of high-voltage steep pulse. It can be extended to measure the descendant time of pulse, pulse width and periods.