面向方向回溯波束控制的低成本数字相位共轭电路
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重庆大学电气工程学院

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国家自然科学基金资助项目(U22B2095);民用航天技术预先研究项目(D010103)。


A Low-Cost Digital Phase Conjugation Circuit for Retrodirective Microwave Wireless Power Transmission
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Chongqing University

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Supported by the National Natural Science Foundation of China (U22B2095), and the Civil Aerospace Technology Pre-research Program (D010103).

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    摘要:

    方向回溯以相位共轭为核心技术实现相控阵波束的动态指向控制,但随着相控阵通道数的增多面临硬件电路成本和复杂度迅速增加的难题。本文提出一种基于FPGA的低成本低复杂度的数字架构相位共轭实现方法,首先,利用预置滤波器与比较器构成1-bit ADC,将中频导引信号的相位信息转换为数字脉冲时延;然后,由FPGA进行1-bit数字时间反转处理;最后,通过重构滤波器作为1-bit DAC,恢复出相位共轭正弦波,以简单的模拟前端和数字时序处理,实现了低功耗、低成本的相位共轭。实验结果表明,在导引信号频率降至1MHz以下及1°相位分辨率的条件下,单个收发通道仅需消耗2个I/O口与46字节存储资源,并且在复杂噪声环境下仍能保持优异的相位检测与重构精度,证明了所提方法的有效性。

    Abstract:

    Retrodirective beamforming relies on phase conjugation as its core technology to achieve dynamic beam steering in phased arrays. However, as the number of phased array channels increases, the hardware circuit cost and complexity escalate rapidly. This paper proposes a low-cost, low-complexity FPGA-based digital architecture to realize phase conjugation. First, a pre-filter and a comparator are configured as a 1-bit ADC to convert the phase information of the intermediate frequency (IF) pilot signal into a digital pulse delay. Subsequently, 1-bit digital time reversal processing is performed by an FPGA. Finally, a reconstruction filter serving as a 1-bit DAC restores the phase-conjugated sine wave, achieving low-power and low-cost phase conjugation through a simple analog front-end and digital timing processing. Experimental results show that, under conditions of a pilot signal frequency below 1?MHz and a phase resolution of 1°, each transceiver channel requires only 2 I/O pins and 46 bytes of memory resources. Furthermore, the proposed method maintains excellent phase detection and reconstruction accuracy even in complex noise environments, thereby verifying its effectiveness.

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  • 收稿日期:2026-02-08
  • 最后修改日期:2026-03-09
  • 录用日期:2026-03-27
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